Each new semiconductor technology node brings smaller transistors and wires. Although this makes transistors faster, wires get slower. As FPGA device designers strive to obtain the lowest possible ...

This paper derives a methodology for developing accurate convex delay models to be used for transistor sizing. A new rich class of convex functions to model gate delay is presented and the circuit ...

Oxide thin-film transistors (TFTs) have attracted much attention because they can be applied to flexible and large-scaled switching devices. Especially, oxide semiconductors (OSs) have been developed ...

Follow this link to access the material. The course makes heavy use of circuit simulation, using Xschem for schematic entry and ngspice for simulation. The 130nm CMOS technology SG13G2 from IHP ...